Ixia’s A400GE-QDD test system makes the challenge of qualifying BER on 400GE electronics easier and affordable. Whether validating chips, optical transceivers, or port electronics, the A400GE-QDD is a dedicated BERT and FEC test system with 56Gb electrical lane signaling per port that gives you the ability to find a problem in minutes, not hours. It shows a system-level view of the BER and FEC performance of all the lanes, all at once, in real time.
400 Gigabit Ethernet (GE) technologies based on the 56Gb electrical lane signaling rates have exponentially increased the level of complexity for the development of stable port electronics in all networking devices. Now, the challenge has become characterizing and quantifying the actual bit error ratio (BER) and forward error correction (FEC) performance of silicon devices, application-specific integrated circuits (ASICs), optical transceivers, fiber and copper interconnects, and the port electronics of switches and routers. Identifying 400GE, 200GE, 100GE, and 50GE BER and FEC performance problems quickly is critical as answers are complex and time-consuming to solve.
- Validate the BER performance of high-port-count devices with 4-ports of the A400GE-QDD 400GE BERT Layer 1 capabilities with Ixia’s KiOS multi-port browser application.
- Find problems faster with KiOS browser-based single page application (SPA), system-view of all the BERT and FEC statistics of all the lanes with 1x400GE, 2x200GE, 4x100GE, and 8x50GE speed support
- Measure BER and FEC performance in minutes, not hours— evaluate new optical transceiver and copper cable interconnect BER at all Ethernet speeds simultaneously using the patented Enhanced BERT option
- Easily generate PASS/FAIL test reports, and perform longduration (timed tests) and stress tests using Ixia’s KP4 FEC symbol bit error distribution analysis—excellent for catching bursty and thermal errors that occur over time
- Simplify connection of A400GE-QDD to Keysight’s M8040A BERT analyzer and your development boards using our optional host and module compliance boards, cables, and adapter bundles
- Leverage field-proven technology that is an extension of our two generations of 400GE QSFP-DD test systems
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Chassis Configurations |
· Desktop or rackmount, 2 RU |
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Physical Interfaces |
· Native QSFP-DD MSA form factor compatible physical ports |
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Chassis Connector Systems |
· Power ON/OFF button · 1 LED per port · Clock IN / OUT: 2 SMA female connectors · Trigger IN / OUT: 2 SMA female connectors · 4 USB: (2) USB 2.0 (2) USB 3.0 compatible ports · 1 RJ45: 1000/100/10Mbps Ethernet management port · 1 Display Port, supports a maximum resolution of 4096 x 2304 @60Hz |
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Chassis Clock IN – Electrical Specifications |
· Frequency: 166.015625 MHz +/- 100 PPM · 50 ohm termination · Minimum = 0.5 Vpk-pk = 0.18 Vrms (sine) · Maximum = 3.0 Vpk-pk = 1.06 Vrms (sine) |
Part Code
A400GE-QDD
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